• Power supply : Vdd: 1.8V ± 0.1V, Vddq: 1.8V ± 0.1V
• Double-data-rate architecture; two data transfers per
clock cycle
• Bidirectional data strobe(DQS)
• Differential clock inputs(CK and CK)
• DLL aligns DQ and DQS transition with CK transition
• Programmable Read latency 5 (clock)
• Burst Length: 4, 8 (Interleave/nibble sequential)
• Programmable Burst type (sequential & interleave)
• Timing Reference: 5-5-5-18 at +1.8V / 5-5-5-15 at +2.2V – 2.3V
• Edge aligned data output, center aligned data input
• Auto & Self refresh, 7.8us refresh interval (8K/64ms refresh)
• Serial presence detect with EEPROM
• High Performance Heat Spreader
• PCB : Height 1.180” (30.00mm), double sided component